My current QL accelerator project

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Will James
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My current QL accelerator project

Post by Will James »

Hi all

I really want a PiStorm for my QL and the way I'm doing it is to build an expansion card with a full socketed 68000 (15MHz).
This will poke out of the end of the QL to give me access to all the signals and the CPU socket.
I am using 2 GALS, a 22V10 to do the interfacing to the 8 bit QL bus, a 16V8 to handle the address decoding for up to 15Gb of
fast 16 bit static RAM, 4 Octal tristate latches to handle the data bus conversion. I have an XOR IC to double the clock rate.
I will be turning off the 68008, probably by holding the /reset low. I sure it won't be straight forward but I have found a lot of helpful information on this forum to help me plan all this.

Once I have got it all working the plan is to try and get the PiStorm (used for Amiga A500) to plug in and replace the 68000.
If I can get this working the next step would be to reduce the size of it all so it would fit in the 68008 socket and adapt the software for the QL. If anyone out there has any thoughts on this approach I would love to get some feedback. For all I know somebody may have already done this?

Will James


Derek_Stewart
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Re: My current QL accelerator project

Post by Derek_Stewart »

Hi,

I thought about PiStorm for the QL, but was not sure if there was enough address lines for the 68008, to make the PiStorm work.

Good idea to make a 68008 to 68000 adapter, which would allow adding a 68000 to the QL.


Regards,

Derek
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XorA
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Re: My current QL accelerator project

Post by XorA »

AFAIK 68000 doesnt have the adaptive bus width stuff, so there isnt a 68000->68008 adapter without more logic!


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Peter
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Re: My current QL accelerator project

Post by Peter »

I'd recommend to look into the software first, and see if you feel up to it. Software will be most of the work. The hardware is simple in comparison.

If you eventually want to access the 8 bit QL bus, it is pointless to use 16 bit hardware and then convert 68000 to 68008 bus cycles. Easier to modify (simplify) the PiStorm hardware so it is 8 bit right away. The emulator used by PiStorm (Musashi) does list the 68008 as possible CPU type.

The Qzero (a working but not publicly released QL-on-FPGA in Raspberry Zero form factor) directly supports the Raspberry I/O pinout, so hardware would be trivial there. I did have a look, but decided not to go further because it's too much software work with too little to gain (for me).


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XorA
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Re: My current QL accelerator project

Post by XorA »

The emulator used by PiStorm (Musashi) does list the 68008 as possible CPU type.
It absolutely lies in that claim :-D


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Peter
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Re: My current QL accelerator project

Post by Peter »

XorA wrote: Wed Feb 12, 2025 9:25 pm
The emulator used by PiStorm (Musashi) does list the 68008 as possible CPU type.
It absolutely lies in that claim :-D
Still doing the 68000<->68008 multiplexing in software isn't more complex than in hardware. :)


Will James
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Re: My current QL accelerator project

Post by Will James »

Peter, that was my first thoughts on how to do this as it would only involve re-laying out the piStorm PCB with one less latch, a couple of signals changed eg A0, DS, instead of UDS, LDS in the CPLD and changing the gpio.c file of the PiStorm source code to do the transfers 8 bit - but testing this seemed a bit daunting and I thought I would find it easier to get a 68000 interfaced as a first step as I already have experience with this and it's easy to build a prototype on vero board and doesn't need level shifting or CPLDs. It's such a shame that the Miracle systems stuff hasn't been made public.


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bwinkel67
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Re: My current QL accelerator project

Post by bwinkel67 »

I had acquired a 64-pin DIP-style PiStorm and was going to try and match lines to the 68008 via breakout board and then look at the software end. I never got far with it because at the time it was hard to get the appropriate Pi (PiZero 2W I think) so the project was tabled since without a Pi it's pointless (I mean you could get them but at a hugely marked up price and I'm on a limited budget).

Also, I didn't have all the parts for my spare QL and was having trouble sourcing a decent priced ULA (I didn't want to risk my NTSC QL as the test system). So the project just halted, esp since I really only have time for stuff like that during the summer. But it would be cool to see it work.

To be honest, my initial approach was to forgo acceleration and just see if you could substitute the CPU for an emulated one running at the same speed because at the time I thought that might solve some timing issues that people warned me would be the trickiest thing here...well, besides not blowing any of the rare ICs by not knowing what I was doing :-/

So I'm excited to see someone that may know what they are doing, working on it. Please keep us posted. There's lots of great hardware work being done on QL accelerators (Leon & Peter), but I think it would be cool to get a PiStorm-like emulation also working.


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Peter
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Re: My current QL accelerator project

Post by Peter »

Will James wrote: Thu Feb 13, 2025 8:49 pm [...] - but testing this seemed a bit daunting and I thought I would find it easier to get a 68000 interfaced as a first step as I already have experience with this [...]
Testing won't be much easier that way. After you have that hardware perfectly implemented, all you will get is a crash - the PiStorm software expects an Amiga. The PiStorm is not simply a 68000 CPU emulator, but an Amiga specific system emulator. Only for a fraction of the Amiga memory map, it accesses the 68000 socket at all. A look at the "PiStorm 4 Atari" project shows how system specific the software endeavor is. To rewrite the software for the QL is the major challenge, not the hardware. At least for me. It might be different, if you have digged deeply into the software side already. But your post did not sound like that.


Will James
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Re: My current QL accelerator project

Post by Will James »

Hi all, I decided to follow Peter's advice and not bother with making a 68000 board for the QL, I went straight for a PiStorm in the expansion socket, once it's working I'll do a CPU Socket version.

I am trying to make the minimum of changes to the PiStorm source code to make it 8 bit and to the Verilog CPLD code.

Once it's running, it I will need to strip out the Amiga stuff and make virtual HDD, RTG and Network stuff for the QL.

I had to 5 boards made if anyone else would like to join in the fun, message me.

Please let me know if you can see anything wrong on the schematic that I may not have thought of,
I am not sure how I will disable the 68008, as there is no Halt on the expansion port but I guess I could just take it out altogether.

Will
QL PiStorm Schematic.pdf
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