A small QL

[Peter]

I don't understand the hype around those chinese GoWin FPGAs. If I look at authorized distributors, they have already become more expensive than the Lattice chips used on QIMSI and Qzero.

The Amazon prices for a Tang Primer 25K and the required extra modules are more expensive than a QIMSI Gold - something at least QL specific and can run SMSQ/E with highcolor.

[aalea]

I think is because it come in a pcb ready to use without bga soldering or aditional tools, arrow/intel try first with the cyc1000 and max1000, but fail to supply, an price increase a lot.

[Derek_Stewart]

Hi,

The Tang Nano 20K development board, cost me £29, but the price has dropped to just above £23.

I am trying to learn FPGA Verilog programming, this seemed to be a good solution.

[Peter]

The Tang Nano 20K development board, cost me £29, but the price has dropped to just above £23.

Also see it for 61 € at Amazon and the GoWin chip on it seems already obsolete.
While the Q68 was designed in 2008 and the Lattice FPGA is still available.

[Derek_Stewart]

HI Peter,

I totally agree, I am totally sold on the Q68, which I use on a daily basis, all my QL work is done on the Q68, it is the most complete system.

I thank you for designing it and I just hope my production of such a marvel, does not diminish your high standards.

I may f wasted money on the Tang Nano 20K, but at the time the idea of learning Verilog seemed a good idea. Maybe the Lattice approach might of been a better idea.

[Peter]

I may f wasted money on the Tang Nano 20K, but at the time the idea of learning Verilog seemed a good idea. Maybe the Lattice approach might of been a better idea.

Hi Derek, please do not get me wrong. Nothing speaks against the GoWin chip to learn Verilog.
My question was more about the advantage of those chips for QL hardware, and I didn't quite find it in comparison to Lattice.

[Pr0f]

I got one of those kits to see what the dev tools were like. It seems there are a good few design constraints on the pins, so what looks like a lot of pins soon gets eaten up with the dev board resources. I've seen the 20k used to define the Yamaha MSX2 chip, but Peter gets a video controller, a memory interface, SD card handling and a full blown 68k CPU on his fpga!

[Derek_Stewart]

Hi,

I totally agree, the Q68, Qzero all are brilliantly designed. I realised this when I saw the Q40, and I went on to build the Q60.

I maybe at the limit of my technical ability, I seem to blinded my technology and struggle with the design of FPGA.

The Tang Nano 20K, seemed a good idea, for my own private educaton, but if it goes nowhere, it didn't cost too much.

Personally, I am really happy with the Q68, since I seem to have time to use it.

[Pr0f]

I think you've done a great job getting the q68's out to so many Derek, it's attracted a good few people back to the QL scene!

[Derek_Stewart]

Hi,

Thanks for the nice words.

The main reason for trying to learn how programme FPGAs, was to convert the Aurora MACH code into Verilog.

I have completed the Aurora PCB coversion into KiCad, fixing the inner layer problems, and correctly routing all the tracks.

I thought about changing the MACH CPLD to something more up to date, but that would mean changes to Verilog.

However, the launch of the QIMSI Gold seems make thd Aurora redundant.