Yes. To clarify/correct myself, the circuit to pull DSMCL high is implemented physically on the expansion. It's a line in my equations. I had to invert it because the area that's valid external is much larger with a 24 or 32-address line CPU than a 68008.
One of the things I regret is that people ...
Search found 2824 matches
- Sat Aug 23, 2025 9:10 pm
- Forum: Hardware
- Topic: Port Map And Signals Descriptions
- Replies: 14
- Views: 269
- Sat Aug 23, 2025 7:04 pm
- Forum: Hardware
- Topic: Hardware programmable timers
- Replies: 23
- Views: 876
Re: Hardware programmable timers
The 'beat' in BPM is a quarter, not a beat, so if you wanted 24 ticks per quarter note, at 120 bpm that would be 48 ticks per second.
In the end, what is acceptable depends on the ear more than theoretical numbers and one should experiment.
Btw, MIDI has "running status", so a "note on" event ...
- Sat Aug 23, 2025 6:36 pm
- Forum: Hardware
- Topic: Port Map And Signals Descriptions
- Replies: 14
- Views: 269
Re: Port Map And Signals Descriptions
The KILLH signal is logically A18 AND A19. It indicated an external bus cycle. When KILLH is asserted it sets DSMCL continuous High (negated). This prevents the 8301 from being active on the bus, read or write.
The DSL signal remains operational on the expansion port, which allows the CPU to ...
The DSL signal remains operational on the expansion port, which allows the CPU to ...
- Thu Aug 21, 2025 7:32 pm
- Forum: Hardware
- Topic: Hardware programmable timers
- Replies: 23
- Views: 876
Re: Hardware programmable timers
MIDI is a 'bit' different, in that it can be used as an 'immediate event' serial stream - a 'note on' code received is immediately played.
That's the trap I'm in, yes. MIDI events are acted on immediately.
A MIDI file measures time in ticks. The file contains a header that establishes the ...
- Thu Aug 21, 2025 6:46 pm
- Forum: Hardware
- Topic: Hardware programmable timers
- Replies: 23
- Views: 876
Re: Hardware programmable timers
Wouldn't it be possible to implement a hardware FIFO for the audio samples which can hold data for over 20 ms and feed the synthesizer directly at the intended sample rate?
Yes. I have always implemented D2A channels with 2Kx9 FIFOs, using the 9th bit as a signal present marker. If I implement ...
- Wed Aug 20, 2025 11:22 pm
- Forum: Hardware
- Topic: Hardware programmable timers
- Replies: 23
- Views: 876
Re: Hardware programmable timers
My project will be open source on release. Anything I do that isn't open source will become so on my death. :D
The more the merrier. My sound card is a synth on a chip. It's not an 80s sound chip like on every computer in 1984 - instead, it's a late 80s chip from the heart of a Yamaha DX ...
The more the merrier. My sound card is a synth on a chip. It's not an 80s sound chip like on every computer in 1984 - instead, it's a late 80s chip from the heart of a Yamaha DX ...
- Wed Aug 20, 2025 8:02 pm
- Forum: For Sale
- Topic: QL Printer Ribbons
- Replies: 0
- Views: 103
QL Printer Ribbons
I just bought a pack of 6 new QL printer ribbons.
I will likely use two ever, so I'll offer up the others in two lots of two to any American QLers for $20 for two, shipped. These are brand new in sealed poly wrap Seikosha SP-800 black ribbons.
They should be here on Monday.
I will likely use two ever, so I'll offer up the others in two lots of two to any American QLers for $20 for two, shipped. These are brand new in sealed poly wrap Seikosha SP-800 black ribbons.
They should be here on Monday.
- Wed Aug 20, 2025 4:55 pm
- Forum: Hardware
- Topic: Hardware programmable timers
- Replies: 23
- Views: 876
Re: Hardware programmable timers
The problem with such a system resource is, who gets do decide the correct divisor and what happens when it is changed and the internal division counter is in any given state - for instance if it is a count down type timer and someone changes the reset value (which is the divisor) from say 100 to ...
- Tue Aug 19, 2025 9:10 pm
- Forum: Hardware
- Topic: Hardware programmable timers
- Replies: 23
- Views: 876
Re: Hardware programmable timers
The CPU simply has no way of ever seeing an interrupt with IPL 1, 3, 4, or 6, because it lacks an IPL2 pin (rather, IPL2 is internally always equal to IPL0). The arrangements in the exception table are still there for compatibility reasons (and you could, in theory, also install handlers on them ...
- Mon Aug 18, 2025 10:58 pm
- Forum: General QL Chat
- Topic: The Super QL
- Replies: 5
- Views: 309
Re: The Super QL
I can see that. Lovely.
I like the idea of an external keyboard. Stephen Usher's pico matrix jobberdeedoo could be messed with to read the matrix and convert it to PS/2. Wonderful starting point. Keep the cable as thin and light as possible.
Who's going to hit up AI to make some images?
I like the idea of an external keyboard. Stephen Usher's pico matrix jobberdeedoo could be messed with to read the matrix and convert it to PS/2. Wonderful starting point. Keep the cable as thin and light as possible.
Who's going to hit up AI to make some images?