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Wondering if a "dead test" ROM is feasible on the QL.

Posted: Wed Apr 23, 2025 6:53 pm
by stephen_usher
Given that lots of machines these days have a "dead test" diagnostic ROM built for them which can operate with no RAM and lots of the hardware dead I was wondering how much of this would be possible on the QL.

Looking at the schematic I'm guessing that as long as the ZX8302 is operating at least some indication of start-up failure could be signalled by, say flashing a microdrive LED. To get any serial output would require the IPC to be operating as well as the ZX8302, though I don't know if you need working RAM to send commands to the IPC.

I guess that after the ROM has got this far it can do a March RAM test of the main 128K RAM and if that passes then it can start using that and continue with more advanced diagnostics and use the display.

Feasible?

P.S. Looking at the on-line documentation on-line I can't seem to find anything fully detailing how to initialise and program the ZX8302 at the low level and I can't decipher the Minerva code.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Wed Apr 23, 2025 6:55 pm
by Pr0f
The ZX8302 does the output for serial data - so the IPC would not be needed for that.

It's a good idea :-)

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Wed Apr 23, 2025 7:06 pm
by stephen_usher
Pr0f wrote: Wed Apr 23, 2025 6:55 pm The ZX8302 does the output for serial data - so the IPC would not be needed for that.

It's a good idea :-)
Indeed, but the interface for throwing the data at the ZX8302 for serial output goes through the IPC usually. If there was a known way of accessing this without going through the IPC that would be ideal. Fewer chips need to be working.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Wed Apr 23, 2025 8:29 pm
by tofro
Question #1 would be if the QL custom chips have failure modes that leave the bus operational - if no (if they somehow occupy bus signals when they fail), all further discussion is probably futile.

You can have the ROM port hold ROMs that start from address 0 - but you'd have to remove the in-built QL ROMs first, however (which means you can just as well use their sockets to place the ROM and also means you will not be able to test the ROMs' integrity).

Video output needs working memory, so, not an option to use as initial "fail" signal, the beeper needs a working IPC, so, also not an ideal option. The serial ports need a working 8302, the handshake lines a working 8049, the network port a working 8302 as well - There's simply not a lot you can do with a "minimal working system", i.e the CPU and a ROM. There are three main failure modes QLs are typically in: One of the ULAs is dead, or the memory subsystem is somehow non-functional. So, it doesn't really make sense to rely a dead test on a working 8302 or 8301. I think the best bet is on a working 8049, those seem to be relatively robust (the 8302, however, needs to be OK as well to be able to talk to it...). So, your vehicle to send signs of life (or, diagnostic information) would be the beeper or the serial port's handshake lines.

In principle, you could build diagnostic software (or at least, an initial RAM test) without using RAM at all, the 68k has enough registers for that. Any failure would need to be signaled with the help of the hopefully working IPC. In case you detect RAM failures, the problem could still either be with the RAM itself, the multiplexers, transceivers, or the 8301. which of those would cause the problems is not that easy to detect, with a single broken RAM chip maybe the easiest (but Minerva can find this as well, at least in many cases). How to detect a failed ULA is I think, not very easy without knowing what failure modes exist - you'd likely need a collection of failed ULAs to research that.

Once at least the lower 32k of memory have been verified to work properly, life gets a bit easier - You can use screen memory to communicate to the user - Whether he will actually see something, however, depends on the working state of the 8301.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Wed Apr 23, 2025 9:42 pm
by stephen_usher
All systems need a minimal working set of chips. In the case of the Commodore 64 it's the CPU, PLA and VIC-II. In the case of the Amiga it's the CPU, Gary and Agnus, as well as the ROM. In the case of the QL it's the ROM, CPU and ZX8302. That's fine as you're replacing the ROM so only the CPU and ZX8302 to run code and possibly make a signal in some way.

For a diagnostic output the serial port doesn't need flow control or input, just blindly throw bytes out on the TX line. That's what other systems such as the Amiga DiagROM and Atari ST diagnostic cartridge do. They both use the minimum amount of set-up to send SOMETHING out the serial port to show that something has happened, even if it turns out to be corrupt junk.

If this diagnostic ROM which doesn't need the IPC, RAM or ZX8301 doesn't run then something will be so wrong that an oscilloscope should easily pick it up. The failure to run narrows down the possible faults, which is a "win". You could remove the ZX8301 if that's the problem and still test the rest of the system.

I would suggest signalling in a way that doesn't need serial connection as well, such as the Microdrive LEDs which are completely controlled by the ZX8302.

As for trying to use the IPC as a "dead test", it doesn't have access to the rest of the system and you can't program it so that's not at all of any use.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Wed Apr 23, 2025 9:59 pm
by martyn_hill
Hi all!

Just to add/highlight - a working ZX8301 is essential - it delivers both the Clock to the CPU and also manages the DTACK line, without which, the CPU will never recognise a complete bus transaction and remain in limbo...

Still, I very much like the idea behind the original question!

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Wed Apr 23, 2025 11:48 pm
by stephen_usher
martyn_hill wrote: Wed Apr 23, 2025 9:59 pm Hi all!

Just to add/highlight - a working ZX8301 is essential - it delivers both the Clock to the CPU and also manages the DTACK line, without which, the CPU will never recognise a complete bus transaction and remain in limbo...

Still, I very much like the idea behind the original question!
Fair enough. I missed that. However, it would still work with a partly working ZX8301, if just the video output is fried.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Thu Apr 24, 2025 7:19 am
by Derek_Stewart
Hi,

I wondered about this possibility a long time ago, to have a test board that plugged int the ROM Port and could perform a ram test and possible diagnostics on the QL in question. But the idea was scoffed at, as being impossible a not worth it.

However, if there is a mini QL on the Diagnostics board, that can test the main computer, this cold be done.

The mini computer in the Rom Port was verified as a possibility when the QIMSI Gold can run in the ROM port with some or all the parent QL facilities, again another idea dismissed.

Maybe just another 8302, 8301, and CPU in FPGA, with ram on a plugin ROM board would do the job.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Thu Apr 24, 2025 10:57 am
by stephen_usher
Surely the biggest problem with trying to use the ROM slot is that you need a working system before the ROM slot is accessed by the operating system, so you have a bootstrap problem.

Unlike the Commodore 64 which has a pin on the cartridge port to disable the on-board ROM or the Atari ST which only needs the system be able to run four instructions from the ROM with no RAM access the QL's ROM port is called only once the OS is mostly up and running after the memory test and other initialisation has happened.

This is why in the case of the QL the system ROM would need to be replaced, in the same way that it does on an Amiga for DiagROM.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Thu Apr 24, 2025 11:05 am
by stephen_usher
Thinking about the issue with the ZX8301 generating the clock and /DTACK.

I guess that a simple board with a GAL may be able to replace those functions.

Diagnostic tools need to be cheap and easy to build as you don't want to have to invest a large amount of money in something you'll rarely use.

Seeing as you'd need a board to adapt the ROM pinout to an EPROM I s'pose you could add a couple of chips to replace the ZX8301 /DTACK and clock generation with fly leads which could plug into the correct pins of the ZX8301 socket.