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Q: expansion cards on SGC vs GC

Posted: Wed Mar 17, 2021 8:37 pm
by ppe
Hello gold card gurus!

Having managed to get my network card working with a SGC I'm wondering what the SGC and GC differences are in handling expansion cards.

SGC manual is very helpful and explains that it maps addresses $4C0000 to $4FFFFF to the expansion bus with A19 and A18 set to 1 when this access is made. The manual also has a very helpful figure showing the pin differences between SGC and non-SGC QL. Armed with this info it was relatively straightforward to get a card working.

GC manual does not have a corresponding section on expansion cards so my questions are:
- Does the GC support expansion cards?
- If it does, what are differences between GC and SGC (pins, memory mapping) ?

Many thanks in advance for any help or pointers to further documentation!

Kind regards,
Petri

Re: Q: expansion cards on SGC vs GC

Posted: Wed Mar 17, 2021 10:14 pm
by mk79
ppe wrote:GC manual does not have a corresponding section on expansion cards so my questions are:
- Does the GC support expansion cards?
- If it does, what are differences between GC and SGC (pins, memory mapping) ?
If the existing schematics are to be believed A21 to A23 are not connected on the CPU, so the GC cannot be expanded, except through the ROM port.

Marcel

Re: Q: expansion cards on SGC vs GC

Posted: Wed Mar 17, 2021 10:38 pm
by Pr0f
The gold card ties A18 and A19 to ground - so no expansion possible on this card

Re: Q: expansion cards on SGC vs GC

Posted: Thu Mar 18, 2021 6:13 am
by ppe
Thank you for confirming my suspicions, Marcel and Pr0f!

Re: Q: expansion cards on SGC vs GC

Posted: Thu Mar 18, 2021 9:14 am
by Derek_Stewart
Pr0f wrote:The gold card ties A18 and A19 to ground - so no expansion possible on this card
Hi,

If A18 and A19 are disonnected from ground and connected to the QL bus, is expansion possible, or is it not that easy?

Re: Q: expansion cards on SGC vs GC

Posted: Thu Mar 18, 2021 10:51 am
by Pr0f
I think the problem is that the CPLD on the Gold Card just doesn't have these outputs - so they have no meaning, and the CPU's address lines are used by that CPLD to drive the RAM and select any necessary QL addresses in the lower 256K (an un-expanded QL) when required for I/O and screen etc.

The SGC does drive these lines, but together - effectively translating what was 0x0C0000 to above the 4M of memory limit. I presume they patched ROM scan code to look for I/O at higher addresses.