The Sinclair QL Forum

I did an internal ram upgrade to 640K to my old QL using simple logic chips. The decoder was based on 3 logic ics that I already had in my drawers and I did it without making a PCB, it looks a mess but it seems to work fine. I used a 512k x 8bit static ram 684000 ram.

Here is the decoding circuit:

It looks like this:
And it seems to work fine:

Although I haven't seen any problem with the previous decoding circuit I made a more "complete" version of the decoding circuit that takes into account both DS and AS without the need of more logic ics, the following that I'm going to try soon.

Ok this works too.
It also loads the cpu DS line less.

Don't bother with ASL. The QL does not use it and neither should any peripherals except maybe a set of bus buffers.
74HCT125 could gave been replaced by small schottky diodes appropriately oriented (something ike BAT42). HC(T) can be loaded quite a bit in real world applications.
Also /WR and /OE on the RAM can be simply direct and inverted copies of RDWL from the CPU. The RAM loads them as much as a HC(T) series chip input so no need for extra buffering.

thank you very much for the tips.
There is no extra buffering, what I changed in the first schematic where DS drived 2 chips is that in the second I drived the OE from the NAND output so DS now drives only 1 chip.

Hi guys

I am in the midst of designing my own 512K expansion using the very same 4Mbit SRAM so interesting to see this working example!

I have a question regarding the driving of the DSMC(l) line - haven't we always been told that a 'fast switching transistor' should be used to drive this line, rather than TTL logic - something about either the latency or else the OC output?

It would certainly simplify things if I didn't have to add a transistor...

The 74xxx125 has a tri-state output, so for a line that has to be either open (hi-z) or low, it can pretend to be an "open collector" logic gate if the input is wired to a fixed level and the "logic" input is wired to the tri-state control input

Or the 74xxx125 can be wired, so for a line that has to be either hi-z or driven high (logic high), it can wired to do this job as well

When considering circuits, you have to look at what a logic control line is actually doing. In microporcessor systems they can be logic high, hi-z (tri-state) or low.

Mark

May be this... (can't think of any simplier design using standard logic chips) Mark

PS note to self: logic needs checking once I am actually awake

I think DTACK has also to be tri-stated hi-impendance when not low.
Also one can use faster ttl ic family than I did (i couldn't wait for the stores to open as soon as I received the ram I had to try it).