The Sinclair QL Forum

XorA wrote: Sat Jul 12, 2025 12:06 am It would probably not too hard to make microdrive work on a Pi connected to GPIO port. If someone was particularly driven!

That's actually a question I posed to Charlie and he said it would not be that simple. I was curious if we could create an interface between a microdrive and a PC so one could connect it to a PC and treat it like a USB drive.

[edit: the inevitable "why" will come up and to that I say that being able to manage old carts from a PC (or emulator) would be handy...and the overall concept would be neat. But then again, I don't hate microdrives so I'm quirky like that]

bwinkel67 wrote: Fri Jul 11, 2025 10:53 pm I also think there is a slight difference between the emulation in a PiStorm and a software emulator written for Windows or Linux, isn't there?

This project is a software emulator for Linux, and depending on the underlying Linux OS.

XorA wrote: Sat Jul 12, 2025 12:06 am

Okay, the microdrives are point I understand. For me they always were good riddance and unused for over 30 years, so I didn't consider.

It would probably not too hard to make microdrive work on a Pi connected to GPIO port. If someone was particularly driven!

One could use a kernel with realtime patch and dedicate one CPU core solely for that purpose. Shouldn't be too hard.

Peter wrote:

XorA wrote: Sat Jul 12, 2025 12:06 am

Okay, the microdrives are point I understand. For me they always were good riddance and unused for over 30 years, so I didn't consider.

It would probably not too hard to make microdrive work on a Pi connected to GPIO port. If someone was particularly driven!

One could use a kernel with realtime patch and dedicate one CPU core solely for that purpose. Shouldn't be too hard.

That was exactly my thoughts, uD is rather slow compared to the bigger pis.

So it boots to the start screen but doesn't respond to F1 or F2... when I look at !IPL1 and !IPL0/!IPL2 with my logic analyser there are no interrupts arriving...
I know writing to the screen register is working as I can change between mode 4 and mode 8 and turn the screen off. This means my read and write mapping is ok.
The 4089 doesn't appear to be generating any interrupts... Is there something QL-ish and weird about the 8049/ZX8302 that I should know about.
I was expecting to see 50Hz interrupts and also interrupts when I press a key. - Nothing.
From the schematic it looks like the ZX8302 can pull IPL1 low to cause an interrupt and the 8049 can pull both IPL1 and IPL0/IPL2 low to cause a level 2 ,5 or 7 interrupt.
If anyone has any insights into why I might not be getting anything, that would be great. It's been a long hot day in my shed trying to sort this.

Hi Will!

I've been following your progress with great interest

You can ignore interrupts from the 8048/IPC, but should expect IPL1 to go active on each 50Hz interrupt - but only after you see the Minerva logo appear (if Minerva installed), or else once the traditional F1/F2 prompt is drawn.

Again, if Minerva installed, you should see the realtime clock displayed in the start-up prompt and, if it remains ticking along between RESETs (not necessarily between reboots), then access to the 8302 Peripheral Chip ULA is likely good as reading the clock involves quite a bit of bus activity.

The keyboard is actually polled although usually after an Interrupt is accepted by the CPU - the keyboard doesn't actively raise an interrupt, unlike, say, a PS/2 keyboard. Thus, at this stage, the only interrupt activity you should expect to see is IPL1 going active, coincident at each 50Hz (VSYNC) pulse - and, as I say, not until the start-up prompts are rendered.

Hope that moves your troubleshooting along a tiny bit...

Thanks Martyn, this is exactly the kind of thing I need to know. Chat GPT, although utterly brilliant, seems to make a lot of stuff up about QL architecture as it goes along, it's got me right confused at the moment.

Funny you should mention Minerva, as I get a perfect boot up to the F1 F2 screen with a JS ROM, but Minerva goes a bit wonky, I think it has a very different RAM test procedure...

Hi Will

By 'wonky', what do you observe under Minerva?

XorA wrote: Sat Jul 12, 2025 2:42 pm

Peter wrote: One could use a kernel with realtime patch and dedicate one CPU core solely for that purpose. Shouldn't be too hard.

That was exactly my thoughts, uD is rather slow compared to the bigger pis.

I would love to see someone create an interface where you could hook up a ZX microdrive to a PC and be able to grab data off old carts. It's rather a small niche though so would have to be just a thing someone did for the sake of dong it.

Anyways, this is Will's hardware project page and not the appropriate place to discuss...sorry. But happy that Will's accelerator will interface with microdrives and try to keep the old hardware accessible whilst speeding it up and adding other features. Sign me up!