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Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Tue Jun 10, 2025 9:47 am
by stephen_usher
I've not been able to test the lower RAM test failure error reporting yet, so testing on a real machine with 128K memory errors would be useful.

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Thu Jun 12, 2025 1:57 pm
by stephen_usher
I've completely re-written the base 128K RAM error reporting.

On the serial port it reports what address the error occurred at and the bad bits.

On the screen it draws nine bands, the first is the memory bank, white for lower and black for higher. This is followed by bands for each bit, 7 -> 0, green for correct and red for bad.

e.g.
capture.jpg

Re: Wondering if a "dead test" ROM is feasible on the QL.

Posted: Mon Jun 16, 2025 8:33 pm
by stephen_usher
Keyboard test now uses interrupts, so this tests the system interrupts too effectively.

All the IPC reading code has been re-written as after reading the Minerva source code I found that the documentation I was using was wrong.

I've added a PDF document to the repository, derived from the Minerva source, detailing in plain English the IPC commands with inputs and outputs and the IPC communication protocol as well.

This work is in preparation for the serial port read test and all future keyboard and serial I/O to support the menu system.

I've also swapped the two memory test methods, both for the base 128K and for the expansion memory so that the March test comes first. This will more accurately pick up all bad bits first rather than potentially only some with the "own address" test, which is only really good at picking up shorted data lines.