Adventures with I2C & Minerva Mk2

[t0nyt]

Hi t0nyt

I recall reading that the Minerva MKII can only act as Master and that ID clash will therefore be with the RTC/NV-RAM device that is fitted alongside the EEPROM and PAL.

Not sure whether the RTC IC can be configured for another ID, but would imagine so...

Hi Martyn,

Yes, sorry, that’s what I meant. When I began testing writing to the 32kb I2c device I was getting all sorts of weird results until I finally realised the nvram on the mk2 was getting corrupted because I was actually read/writing the mk2 nvram.

That then caused all sorts of issues rebooting the QL as Minerva got more than a little confused hanging/crashing trying to process the boot options

[Dave]

I was going to ask you to document your findings, but I realized I can just ask an AI and it will scrape this site and proffer the answer with no effort on your part.

[NormanDunbar]

OK, thanks.

I haven't seen or used a Minerva Mk2 so I didn't know about the RTC or NV RAM. One of those will have the $50 address, not the Mk2 itself. My mistake.


Cheers,
Norm.

[Pr0f]

It's odd that address $50 is causing issues - the original MKII Minvera used an 8583 which is RTC and NVRAM combined.

According to both the datasheet and the Minvera sourcode - this is $A0/$A2 addresses:

* Command sequences: i/o 10srbpa0, special 11gvdc1q
cmd
dc.b 0,$a0/2,%11011110 set device
dc.b 1,%10100000,16 start, write address of id word
dc.b 1,128-16+8-1,%10111100 start, read most of ram, stop
dc.b $ff finish
dc.b $10,$30,$30,$70,$70,0 masks for mm/dd hh:mm:ss & stop
dc.b 1,%10100000,22 start, write address of lsw of boot
dc.b 4,%10001100 write boot/year+flag from buffer, stop
dc.b $ff finish

end

I've attached the pdf as it may prove useful to some

[Pr0f]

Given your experimentations Tony - I'll post up a PDF with some I2C addresses for various devices - includes a few notes about clock stretching devices too - the pdf came from adafruit - who have a good number of I2C devices available on boards basically ready to go (and no I'm not advertising them, just found them to be a useful source for tinkerers)

[t0nyt]

It's odd that address $50 is causing issues - the original MKII Minvera used an 8583 which is RTC and NVRAM combined.

According to both the datasheet and the Minvera sourcode - this is $A0/$A2 addresses:

* Command sequences: i/o 10srbpa0, special 11gvdc1q
cmd
dc.b 0,$a0/2,%11011110 set device
dc.b 1,%10100000,16 start, write address of id word
dc.b 1,128-16+8-1,%10111100 start, read most of ram, stop
dc.b $ff finish
dc.b $10,$30,$30,$70,$70,0 masks for mm/dd hh:mm:ss & stop
dc.b 1,%10100000,22 start, write address of lsw of boot
dc.b 4,%10001100 write boot/year+flag from buffer, stop
dc.b $ff finish

end

I've attached the pdf as it may prove useful to some

Hi Pr0f,

The device ID is 7 bit so 'A0' would be stripped of the high bit (though still not &50)

The 32kb device I used seemed to be A0 based on the Datasheet, but that didn't work (turned out that was wrong for the physical devices I have as they are definitely &50 based on other info I found)

So not knowing the ID was 7 bit I worked thru and found it at &D0 (or so I thought)
This seemed to work, but I was getting problems which turned out to be the corruption of mk2 clock/nvram
It was then I realised it was 7 bit and that I'd been writing to &50

With regard to Minerva source code, I don't understand that because the miniconfig (from minerva utilities) reads/writes &50 (also &48 for something)

Thanks
Tony

[Pr0f]

So that address A0 / A2 - they are saying that those are read/write addresses - so they are looking at the bit order the other way around I suspect.

Curiously if $A0 is read back in the reverse order - then that's $05. Take a look at page 17 of the PDF for the 8583 chip - The Address select line A0 toggles the value in the 2nd bit - Hence A0/A2 - and the 1st bit is the R/W select - so the least significant bit.

[t0nyt]

So that address A0 / A2 - they are saying that those are read/write addresses - so they are looking at the bit order the other way around I suspect.

Curiously if $A0 is read back in the reverse order - then that's $05. Take a look at page 17 of the PDF for the 8583 chip - The Address select line A0 toggles the value in the 2nd bit - Hence A0/A2 - and the 1st bit is the R/W select - so the least significant bit.

I really don't understand this $A0/$A2 address that comes up for this device all over google, it's just not a valid ID is it?

It's like it's taking reverse order then shifting it 8 bits to get to $50, maybe something on the mk2 board is doing something with the address (but it's beyond me to figure that out though!)

[Pr0f]

I think the address is correct - and it's the bottom bit of the byte that selects whether reading or writing, the next bit in is the selectable address (A0 or A2) that it can operate at.

[Pr0f]

I think the address is correct - and it's the bottom bit of the byte that selects whether reading or writing, the next bit in is the selectable address (A0 or A2) that it can operate at.

The Mivera manual says the following:

Thus to write $1234 to location $56, the following is sent:
<start><$A0><$56><$l2><$34><stop>
Note that the address of 80 is doubled to $A0, and the write bit, 0, inserted as the least
significant bit.
To read back from locations $60.63, the following is sent:
After the second start condition the device address is sent out again, but this lime with a
read bit, 1, inserted as the LSB, so $AI is sent: at this point the 8583 starts outputting
data until the stop condition occurs.