My current QL accelerator project

[dilwyn]

Thanks Peter - I'll look into it. Is it on github?

No, it's on the QL homepage: https://dilwyn.theqlforum.com/qlsd/index.html
Your PLD looks relatively large, maybe the logic fits. Driver and hardware allow hot-plugging, so you might find it more convenient than floppy. Several hundreds of QL-SD, Q68, QIMSI Gold are out there, so among active users, it's practical usage as removable media has probably surpassed floppy nowadays. (Even more when it comes to data exchange with emulators.)

I'd tend to agree with that. Although I have a QL with floppy drive and QIMSI set up, it's very rare to use the floppy drive at all unless I want to test something specific, or try to retrieve an old floppy disk. So many of my floppy disks are unreadable nowadays, goid job I had the foresight a few years ago to backup to other media. SD cards are so convenient for exchanging lots of data between the various systems here.

[Will James]

Can anyone out there think of a reason why if I remove the 68008 from the QL there appears to be no bus activity... I would have expected there to be video accessing RAM and DRAM refresh activity, but for some reason I don't see anything apart from the clock...

[martyn_hill]

Hi Will!

Depending upon precisely 'where' you are attempting to observe bus activity, this might be expected.

The ZX8301 'Master' ULA maintains its own private data/address bus 'behind' an LS245 (data) bus-transceiver and a pair of quad 4-2 multiplexers for the shared 16-bits of address-bus - such that no bus activity would be visible from the CPU/peripheral 'side.' The base 128k DRAM and video all sit within the private bus...

Without a CPU present, the CPU bus itself will indeed be dormant.

Or have a mis-understood something (happens a lot!)

[Will James]

Ah yes, the buffering, that makes sense. However, I was expecting at least DTACK to have some activity because I read somewhere the QL
Video circuit holds the bus by keeping DTACK low during an access...
I suppose the whole circuit could be messed up by not having any pull ups in place of the 68K8.

Thanks

Will

[Pr0f]

On the issue 5 - there is a 2K2 resistor pullup on the DTACK line (R71) , and on issue 6 the same, although on issue 6 boards the HAL also provides DTACK (decoded for the ZX8302 I presume)

[martyn_hill]

Hi Will

Ah yes, the buffering, that makes sense. However, I was expecting at least DTACK to have some activity because I read somewhere the QL
Video circuit holds the bus by keeping DTACK low during an access...
I suppose the whole circuit could be messed up by not having any pull ups in place of the 68K8.

The lack of pull-ups will be an issue at some point, but bear in mind that DTACK is generated by the ULA (or HAL, depending on the QL.board issue as per Prof) in response to a CPU access to the data-bus, detected by DS (technically, by DSMC) being made active by the CPU.

No CPU present, no DS, thus no DTACK in response....

[Will James]

Thanks that is really helpful. I think the Bus Access State Engine is locking up in my PiStorm for some reason, so it's not asserting DS, hence no bus activity.