Another question for Peter

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Nix
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Another question for Peter

Post by Nix »

Hi Peter,

Would I be correct in assuming that IRQ3 and IRQ4 on the Q40 ISA bus will only set bit 2 on the interrupt register, whereas IRQ2, 5, 6, 7, 10, 11, 14 & 15 will only set bit 4?
Last edited by Nix on Sun Nov 24, 2024 1:34 pm, edited 2 times in total.


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Re: A question for Peter (unless anyone else knows the answer)

Post by Derek_Stewart »

Nix wrote: Tue Oct 01, 2024 10:25 pm Hi Peter,

Would I be correct in assuming that IRQ3 and IRQ4 on the Q40 ISA bus will only set bit 2 on the interrupt register, whereas IRQ2, 5, 6, 7, 10, 11, 14 & 15 will only set bit 4?
Hi,

I am sorry, I am not Peter...

But if you read the Q40/Q60 Main Board User manual Page 15, there is information you reqwire:
Q40-60_Main Board_User manual.pdf
(550.27 KiB) Downloaded 211 times

The ISA I/O Card I used to fit to the Q60 has an information sheet:
IO_CARD.pdf
(397.6 KiB) Downloaded 196 times

Here is eaxmple setting for the ISA I/O Cards, which details IRQ setting for the Serial and Parallel Ports:
IO-Board_Settings.pdf
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Regards,

Derek
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Re: A question for Peter (unless anyone else knows the answer)

Post by Nix »

Thanks Derek, but I already have this information. This is about the master chip register and how it responds to the IRQs presented on the ISA bus.


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Re: A question for Peter (unless anyone else knows the answer)

Post by Peter »

Nix wrote: Tue Oct 01, 2024 10:25 pm Would I be correct in assuming that IRQ3 and IRQ4 on the Q40 ISA bus will only set bit 2 on the interrupt register, whereas IRQ2, 5, 6, 7, 10, 11, 14 & 15 will only set bit 4?
Yes, you are correct :)


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Re: A question for Peter (unless anyone else knows the answer)

Post by Nix »

Thank you 8-)


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Re: A question for Peter (unless anyone else knows the answer)

Post by Nix »

Another question: Interrupts again

I'm having a bit of difficulty with serial port interrupts in that once triggered, it just jabbers continuously and I can't seem to stop it. Unlike the frame interrupt and DAC interrupt, there doesn't appear to be any register to acknowledge ISA interrupts.
Is there something quirky I'm missing?

Addendum: it appears that IRQ3 (and possibly 4) are unaffected by the external interrupt enable register.


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Re: Another question for Peter (unless anyone else knows the answer)

Post by Nix »

Ok, this is weird.

I'm trying to get interrupt driven serial IO working.
I currently have SER1 (COM1 0x3f8) being used as a polled debug port (no interrupts)

I am using SER2 (COM2 0x2f8 IRQ 3) for my test device.

Initially, I found that IRQ 3 jabbered incessantly regardless of the state of the Q40 external interrupt enable register (MC offset 0x10). However, this was due to the UART being left with its IER set after loading my ROM.
This happened when data was received before the driver had been installed into the kernel. Solution, forcibly reset the UART IER register on kernel initialisation.
This successfully shut it up.

The next issue is that when the driver is installed, it is attached to the IRQ handler, and the UART's IER reg is still set to 0. Only when the port is opened does it allow the interrupts and the UART's IER register is set to 0x0F.
But now, there is nothing. No interrupt is triggered regardless of the state of the Q40 external interrupt enable register.
Nothing in the Q40 interrupt register (yet clock ticks and keyboard activity works as expected).
Nothing in the External Interrupt register (offset 0x04)

I don't understand what's happening :cry:


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Re: Another question for Peter

Post by Nix »

It seems that IRQ 3 (dunno about 4) is completely unaffected by the external interrupt enable register, and the only way I can stop it jabbering is to read IIR and then RHR on the UART.


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Re: Another question for Peter

Post by Mark Swift »

Hi,
I don't know if this will be of any use diagnosing your issue but sometimes looking at similar code to your own can help.
So here is the SER related QDOS Classic source files for Q40/ISA/16650.

SRC.zip
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Re: A question for Peter (unless anyone else knows the answer)

Post by Peter »

Hi, sorry didn't see that you already posted on Nov 22.
Nix wrote: Fri Nov 22, 2024 9:48 pm Unlike the frame interrupt and DAC interrupt, there doesn't appear to be any register to acknowledge ISA interrupts.
The ISA devices are not part of the mainboard, so they can not be acknowledged by mainboard registers.
You need to look into the documentation of the ISA devices, which is not part of the mainboard manual.
Nix wrote: Fri Nov 22, 2024 9:48 pm Addendum: it appears that IRQ3 (and possibly 4) are unaffected by the external interrupt enable register.
Yes, just as documented.
Quoting the manual regarding External Interrupt Enable Register: "request from external interrupt lines 2..7"
Interrupt line 0 (IRQ 3 Com 2/4) and interrupt line 1 (IRQ 4 Com 1/3) are not affected.
In the comments of the PLD source I see that I had removed the serial port from the enable register at some point.
This was probably following the request of one of the OS authors.
Nix wrote: Sun Nov 24, 2024 1:33 pm But now, there is nothing. No interrupt is triggered regardless of the state of the Q40 external interrupt enable register.
Sounds like a hardware problem, likely a faulty or unsuitable ISA I/O card.
Few months ago I gifted one of my last cards to a Linux developer, who was using a crappy 16450 card and also had serial port problems.
With a working card, all was fine. You need a decent ISA card with 16550.


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