The Sinclair QL Forum

Hi all!

Just to add/highlight - a working ZX8301 is essential - it delivers both the Clock to the CPU and also manages the DTACK line, without which, the CPU will never recognise a complete bus transaction and remain in limbo...

Still, I very much like the idea behind the original question!

Hi Peter

If you wish to stick to vanilla SuperBasic, then the following approach will work for any valid SuperBASIC program file:

1. Open the file with OPEN_IN as usual
2. Iterate through all its lines in a REPeat loop, INPUTing each one sequentially in to a variable, say lastLine$
3. Test before ...

Hi Leon!


I have good and bad news to report.

The bad news is that after the aurora modes and speed improvements QLion is no longer compatible with microdrives.


I may be able to give you a head-start there, as I had to rewrite some of the core MDV primitives (taken from Minerva) when I ...

Hi Will


Ah yes, the buffering, that makes sense. However, I was expecting at least DTACK to have some activity because I read somewhere the QL
Video circuit holds the bus by keeping DTACK low during an access...
I suppose the whole circuit could be messed up by not having any pull ups in place ...

Hi Will!

Depending upon precisely 'where' you are attempting to observe bus activity, this might be expected.

The ZX8301 'Master' ULA maintains its own private data/address bus 'behind' an LS245 (data) bus-transceiver and a pair of quad 4-2 multiplexers for the shared 16-bits of address-bus - such ...

Ooo! Intriguing project, Daniele!

Any comments to add???

Hi Martin!

Firstly, thank you for developing this 'exploratory aide' for investigating how FSERVE type traffic flows over the wire.

I shall be using it over the coming weeks to analyse a simple LBYTES client request with the aim of implementing atleast partial client support on a ZX Spectrum to ...

Hi Per!



<>
I'll test your Level1/2 query later and update this thread.
So how did that go?


Tested again and MDLEVEL continues to report correctly for the following scenarios:
NB: All tested from QPC with MDINFOv10 - with the QLUB adapter fitted to allow native QLAN access - station N1 is a ...

Hi Leon!

Just a thought - assuming low latency communications with the ESP, and again assuming that the ESP could be programmed itself, perhaps I could port the nasty bit-banging of the Sinclair network to the ESP and tap-off a pair of signal lines to drive a higher speed NET port?

Hi Peter

Peter wrote: Sat Mar 15, 2025 9:27 pm You should get 24.2. Unless you see something obvious (like loading extensions that consume CPU) I'd be interested in finding the discrepancy.

I probably had FSERVE and Martin Head's brilliant IFSERVE (on the Q68) running at the same time as TIndex to be fair...